Fujitsu F2MC-8L F202RA Hardware Manual page 83

Table 3.7-2 Explanation of Functions of Each Bit in the Standby Control Register (STBC)
Bit name
STP:
bit7
Stop bit
SLP:
bit6
Sleep bit
SPL:
bit5
pin state setting bit
RST:
bit4
Software reset bit
RESV:
bit3
Reserved bit
bit2 to bit0 Unused bits
This bit specifies transition to stop mode.
Writing "1" into this bit allows transition to stop mode.
Writing "0" into this bit does not affect operations.
This bit is always read with the value of "0".
This bit specifies transition to sleep mode.
Writing "1" into this bit allows transition to sleep mode.
Writing "0" into this bit does not affect operations.
This bit is always read with the value of "0".
This bit specifies external pin states in stop mode.
Writing "0" into this bit maintains states (levels) of the external pins at transition to
stop mode.
Writing "1" into this bit sets states of the external pins to Hi-Z (states of pins for
which a pull-up resistor is specified are set to level "H").
This bit becomes "0" after a reset.
This bit specifies software reset.
Writing "0" into this bit generates a source of 4-instruction cycle internal reset.
Writing "1" into this bit does not affect operations.
This bit is always read with the value of "1".
This bit is always read with the value of "0".
Writing a value into this bit does not affect operations.
Values read out of these bits are undefined.
Writing values into these bits does not affect operations.
Description
CHAPTER 3 CPU
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