Fujitsu F2MC-8L F202RA Hardware Manual page 136

CHAPTER 5 TIME-BASE TIMER
Table 5.3-1 Explanation of Functions of Each Bit in Time-base Timer Control Register (TBTC)
Bit name
TBOF:
bit7 Overflow interrupt request
flag bit
TBIE:
bit6
Interrupt request enable bit
bit5
to Unused bits
bit3
bit2, TBC1, TBC0:
bit1 Time interval selection bits
TBR:
bit0 Time-base timer
initialization bit
120
• This bit is set to "1" when the specified bit of the time-base timer counter
overflows.
• An interrupt request is sent when this bit and the interrupt request enable bit
(TBIE) are both "1".
• While this bit is written, it is cleared when "0" is specified, and nothing is
changed and affected when "1" is specified.
This bit enables or disables an interrupt request to be output to the CPU. An
interrupt request is output when this bit and the overflow interrupt request flag bit
(TBOF) are both "1".
• These bits are undefined when they are read.
• Nothing is affected when they are written.
• These bits specify a time interval for the interval timer.
• The interval timer bits of the time-base timer counter are specified.
• One of four time intervals can be selected.
• This bit clears the time-base timer counter.
• The counter is cleared to 000000
changed and affected when "1" is written.
Note:
This bit is always "1" at the beginning of reading.
Description
when "0" is written to this bit, nothing is
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