Fujitsu F2MC-8L F202RA Hardware Manual page 21

Table 1.2-2 CPU and Peripheral Functions of MB89202/F202RA Series
Item
CPU function
Port
21-bit
time-base
timer
Watchdog
timer
8-bit
PWM
timer
8/16-bit
capture
timer/
counter
UART
Periphera
l function
8-bit serial
I/O
12-bit
PPG timer
External
interrupt 1
(wake-up)
External
interrupt 2
(wake-up)
10-bit A/D
converter
Wild
register
Note:
The oscillation is 12.5 MHz unless another condition such as the main clock maximum speed, the clock
cycle value, or conversion time is stated.
Number of basic instructions:
Instruction bit length:
Instruction length:
Data bit length:
Minimum instruction execution time:
Interrupt processing time:
General-purpose I/O port: 26 pins (Also serve as peripherals. 4 of which can be used as N-ch
21 bits
Interrupt cycle: 0.66 ms, 2.64 ms, 21 ms, or 335.5 ms with 12.5MHz main clock
Reset occurrence cycle: When the main clock is at 12.5 MHz (minimum 335.5 ms)
8-bit interval timer operation (Square wave output is supported. Operating clock cycle:
1 t , 16 t , 64 t
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8-bit resolution PWM operation (Conversion cycle:
256 t , 4096 t , 16384 t
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8-bit capture timer/counter × 1 channel + 8-bit timer or 16-bit capture timer/counter × 1 channel
When timer 0 or a 16-bit counter is operating, event-counting operation by external clock input
and square wave output are supported.
Transfer data length: 6, 7, or 8 bits
8 bits length, LSB first/MSB first selectability
One clock selectable from four operation clocks
(one external shift clock, three internal shift clocks: 2 t
Output frequency: Pulse width and cycle are selectable.
3 channels (interrupt vector, request flag, and request output enable)
Edge selectability (selectable from rising edge, falling edge, and both-edge modes)
Also available for wake-up from stop or sleep (Edge detection is also available in stop mode.)
8 inputs 1 channel (L level interrupt and input enable are independent.)
Also available for wake-up from stop or sleep (Level detection is also available in stop mode.)
10-bit resolution × 8 channels
A/D conversion function (Conversion time: 38 t
Continuous activation by 8/16-bit capture timer/counter output or time-base timer output.
8-bit × 2
Specification
136 instructions
8 bits
1 to 3 bytes
1, 8, or 16 bits
0.32 to 5.1 µs (at 12.5 MHz)
2.88 to 46.1 µs (at 12.5 MHz)
open-drain I/O ports.)
, and 8/16-bit capture timer/counter output)
and 256 times 8/16-bit capture timer/counter output)
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)
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CHAPTER 1 OVERVIEW
, 8 t , 32 t )
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