Fujitsu F2MC-8L F202RA Hardware Manual page 394

APPENDIX A I/O Map
Table A-1 I/O Map (3 / 4)
Register
Address
abbreviation
0034
ADEN
H
0035
H
0036
EIE2
H
0037
EIF2
H
0038
H
0039
SMR
H
003A
SDR
H
003B
SSEL
H
003C
H
to
003F
H
0040
WRARH0
H
0041
WRARL0
H
0042
WRDR0
H
0043
WRARH1
H
0044
WRARL1
H
0045
WRDR1
H
0046
WREN
H
0047
WROR
H
0048
H
to
005F
H
0060 PDR6
H
0061 DDR6
H
0062 PUL6
H
0063 PDR7
H
0064 DDR7
H
0065 PUL7
H
378
Register name
A/D enable register
External interrupt 2 control register 1
External interrupt 2 control register 2
Serial mode register
Serial data register
Serial function switching register
Higher address set register 0
Lower address set register 0
Data setting register 0
Higher address set register 1
Lower address set register 1
Data setting register 1
Address comparison EN register
Wild register data test register
Port 6 data register
Port 6 data direction register*
Port 6 pull-up set register
Port 7 data register
Port 7 data direction register
Port 7 pull-up set register
Read/write
Vacancy
Vacancy
Vacancy
Vacancy
Initial value
R/W 00000000
R/W 00000000
R/W -------0
R/W 00000000
R/W XXXXXXXX
R/W -------0
R/W XXXXXXXX
R/W XXXXXXXX
R/W XXXXXXXX
R/W XXXXXXXX
R/W XXXXXXXX
R/W XXXXXXXX
R/W ------00
R/W ------00
R/W ------XX
R/W ------00
R/W ------00
R/W -----XXX
R/W -----000
R/W -----000