Fujitsu F2MC-8L F202RA Hardware Manual page 117

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Block Diagram of Port 6
DDR write
Figure 4.6-1 Block Diagram of Port6
PDR
PDR read
PDR read
(when read-modify-write is
performed)
Output latch
PDR write
DDR
DDR read
PUL read
PUL
PUL write
PDR
PDR read
PDR read
(when read-modify-write is
performed)
Output latch
PDR write
DDR read
DDR
DDR read
PUL read
PUL
PUL write
For MB89202/V201
Stop mode (SPL = 1)
Stop mode (SPL = 1)
SPL: Pin state setting bit of standby control register (STBC: SPL)
For MB89F202/F202RA
Stop mode (SPL = 1)
SPL: Pin state setting bit of standby control register (STBC: SPL)
CHAPTER 4 I/O PORTS
Pull-up resistor
P-ch
Pin
N-ch
Pin
101