Clock Controller - Fujitsu F2MC-8L F202RA Hardware Manual

F2mc-8l 8-bit microcontroller
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CHAPTER 3 CPU
3.6.2

Clock Controller

The clock controller consists of the following six blocks:
• Oscillation circuit
• System clock selector
• Clock controller
• Oscillation stabilization wait time selector
• System clock control register (SYCC)
• Standby control register (STBC)
Block Diagram of Clock Controller
Figure 3.6-4 is a block diagram of the clock controller.
Clock
generator
From the
time-base
timer
SCM
System clock control register (SYCC)
F
: Oscillation frequency
CH
t
: Instruction cycle
INST
54
Figure 3.6-4 Block Diagram of Clock Controller
Standby control register (STBC)
SLP
SPL
STP
1/2 frequency
System clock selector
Pre-scaler
1/4 frequency
1/8 frequency
1/16 frequency
1/64 frequency
Oscillation
14
2
/F CH
stabilization
17
2
/F CH
wait time
18
2
selector
/F CH
WT0
WT1
RST
Clock
Selector
control
circuit
CS1
CS0
Pin control
Stop
Sleep
Clock for time-base
timer
Supplied to the CPU
1t
INST
Supplied to peripheral
circuits
1t
INST

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F2mc-8l mb89202Mb89202/f202ra series

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