Operations Of External Interrupt Circuit 2 - Fujitsu F2MC-8L F202RA Hardware Manual

CHAPTER 11 EXTERNAL INTERRUPT CIRCUIT 2 (LEVEL)
11.6

Operations of External Interrupt Circuit 2

External interrupt circuit 2 detects "L" level at any of the external interrupt pins, then
generates and issues an interrupt request to the CPU.
■
Operation of External Interrupt Circuit 2
To operate the external interrupt circuit 2, the bits of the registers must be set as shown in Figure 11.6-1 .
EIE2
EIF2
DDR0
ADEN
0
When an "L" level signal is input to an external interrupt pin among the pins INT20 to INT27 with external
interrupt inputs being enabled by one of the IE20 to IE27 bits corresponding to the pin, external interrupt
circuit 2 generates and issues an IRQA interrupt request to the CPU.
Figure 11.6-2 shows the operation of external interrupt circuit 2 (when the INT20/AN4 pin is used).
254
Figure 11.6-1 Setting External Interrupt Circuit 2
bit7 bit6 bit5
IE27 IE26 IE25
0 0 0
0 0 0
: Used bit
: Unused bit
: Set "0"
bit4 bit3 bit2 bit1
IE24 IE23 IE22 IE21
0 0 0 0
0
bit0
IE20
IF20
0