12-Bit Ppg Control Register 4 (Rcr24) - Fujitsu F2MC-8L F202RA Hardware Manual

CHAPTER 9 12-BIT PPG TIMER
9.4.4

12-bit PPG Control Register 4 (RCR24)

The 12-bit PPG control register 4 comprises bits for setting a cycle period of 12-bit PPG
waveform outputs.
■
12-bit PPG Control Register 4 (RCR24)
Address
bit7 bit6
0017
H
Readable/Writable
R/W:
: Unused
Table 9.4-4 Explanation of Functions of Each Bit in 12-bit PPG Control Register 4 (RCR24)
Bit name
bit7,
Unused bits
bit6
bit5 SCL11 to SCL6:
to Cycle period
bit0 setting bits
218
Figure 9.4-5 12-bit PPG Control Register 4 (RCR24)
bit5 bit4 bit3 bit2
SCL11 SCL10 SCL9 SCL8 SCL7
R/W R/W R/W R/W
SCL11 to SCL6
XXXXXX Compare value for the cycle period of 12-bit PPG outputs
• Bit value is undefined when being read.
• Written value does not affect other operations.
These bits are used to set the number of counts corresponding to the cycle period of
12-bit PPG waveform outputs (the compare value for cycle period), and the contents
of these bits and the SCL0 to SCL5 bits of RCR23 are compared with a count by the
counter.
Note:
Set a value that falls within the range of "000000000010
(002 to FFF ).
H H
bit1 bit0
Initial value
SCL6 --000000
B
R/W R/W
Cycle period setting bits
Function
" to "111111111111 "
B B