Fujitsu F2MC-8L F202RA Hardware Manual page 395

Table A-1 I/O Map (4 / 4)
Register
Address
abbreviation
0066
H
to
006F
H
0070
PUL0
H
0071
PUL3
H
0072
PUL5
H
0073
H
to
0078
H
0079 FMCS
H
007A
H
007B
ILR1
H
007C
ILR2
H
007D
ILR3
H
007E
ILR4
H
007F
ITR
H
● Explanation on read/write
R/W: Readable and Writable
R: Read only
W: Write only
● Explanation on initial value
0: The initial value of this bit is "0".
1: The initial value of this bit is "1".
X: The initial value of this bit is undefined.
*: No used in MB89F202/F202RA.
Note:
Do not use the prohibited areas.
Register name
Port 0 pull-up set register
Port 3 pull-up set register
Port 5 pull-up set register
Prohibited area
Flash memory control status register
Prohibited area
Interrupt level set register 1
Interrupt level set register 2
Interrupt level set register 3
Interrupt level set register 4
Interrupt test register
Read/write
Vacancy
Inhibited
Initial value
R/W 00000000
R/W 00000000
R/W -------0
R/W, R 000X----
W 11111111
W 11111111
W 11111111
W 11111111
------00
379