Fujitsu F2MC-8L F202RA Hardware Manual page 185

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Block Diagram for 8/16-bit Capture Timer/Counter Pins
Figure 8.3-1 Block Diagram for 8/16-bit Capture Timer/Counter Pins
PDR read
PDR read
(At read-modify-write)
PDR write
DDR write
PUL read
PUL write
Note:
When "pull-up resistor available" is selected in the pull-up setting register, the pin state in the stop
mode (SPL = 1) becomes high (pull-up state), not Hi-Z. During the reset, however, pull-up becomes
ineffective and the pin state becomes Hi-Z.
INT10
PDR
Resource input
Output
latch
DDR
Stop mode
(SPL = 1)
PUL
CHAPTER 8 8/16-BIT CAPTURE TIMER/COUNTER
External interrupt allowed
EC
Stop mode
(SPL = 1)
Resource output
Resource
output
available
enable
P34/TO/INT10
P33/EC
Pull-up resistor
P-ch
Pin
P33/EC
N-ch
P34/TO/INT10
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