Fujitsu F2MC-8L F202RA Hardware Manual page 208

CHAPTER 8 8/16-BIT CAPTURE TIMER/COUNTER
External clock
Counter clear
TSTR0 bits
Counter value
Comparator data latch 1
(lower 8-bit comparison value)
Comparator data latch 2
(higher 8-bit comparison value)
TDR0 *
(lower 8-bit setting value)
TDR1 *
(higher 8-bit setting value)
TIF0
*: A value can be set according to any timing. When the counter is started or when a match is detected,
the data register setting value is loaded to the comparator data latch. In this case, the counter is cleared.
Note:
Confirm the validity of the values set in the counter operating in 16-bit mode.
192
Figure 8.7-4 Counter Function Operation in 16-bit Mode
0000 0001
H H
Load
88
H
13
H
0002 0003
H H
88
H
13
H
Data setting (1234 )
H
1388 0000 0001
H H
34
H
12
H
Load
34
H
12
H
Clear by program
H