CHAPTER 14 8-BIT SERIAL I/O
Figure 14.8-2 8-bit Serial I/O Operation in Stop Mode (Internal Shift Clock)
SCK output
SST bit
SIOF bit
SO pin output
STP bit
(STBC register)
● 8-bit serial I/O operation at issuance of stop request during operation
As shown in Figure 14.8-3 , if operation is stopped (SMR: SST = 0) during data transfer, the 8-bit serial I/O
stops data transfer and clears the shift clock counter. For this reason, the transfer destination must also be
initialized. If serial output is in operation, set the SDR again before restarting the 8-bit serial I/O.
Figure 14.8-3 8-bit Serial I/O Operation at Issuance of Stop Request during Operation(Internal Shift Clock)
SCK output
SST bit
SIOF bit
SO pin output
330
#0
#1
#2
#3
#0
#1
#2
#3
Oscillation stabilization
wait time
Stop mode request
#4
#5
#6
Stop mode
Stop mode release via external interrupt
Operation stop
SDR register resetting
#4
#5
Clear via program
Interrupt request
#7
Restart
#0
#1