Fujitsu F2MC-8L F202RA Hardware Manual page 169

● While interval timer functions are enabled:
Figure 7.8-1 Operation of the Counter in the Standby Mode and during Suspension (while Interval
Counter value
FF
H
00
H
Timer cycle
TIR bit
TPE bit
PWM pin
(OE = 1)
SLP bit
(STBC
register)
STP bit
(STBC
register)
*: When the bit to specify the pin state (STBC: SPL) of the standby control register is "1", and
the PWM pin is not pulled up, the PWM pin in the stop mode is Hi-Z. When the SPL bit is "0", the
value immediately before the move to the stop mode is held.
Functions are Enabled)
COMR value (FF )
H
Clear by the program
Sleep
Release of
sleep by IRQ9
CHAPTER 7 8-BIT PWM TIMER
Clear by stopping operation
Stop Time to wait
request
for oscillation
stabilization
Stopping
operation
*
"L"
is being stopped
Stop
Release of stop by an external interrupt
Time
Restarting
operation
level while operation
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