Fujitsu F2MC-8L F202RA Hardware Manual page 210

CHAPTER 8 8/16-BIT CAPTURE TIMER/COUNTER
● Free-run mode
Setting the clear mask bits (CCMSK and TCMSK) of TCCR to 11
as the free-run timer.
● Clear mode
Setting the clear mask bits (CCMSK and TCMSK) of TCCR to a value other than 11
function to operate as a clear mode.
The clear mode enables the measurement of signal pulse widths and cycles. In this case, using the clear
mode with the compare match detection function also enables the determination of signal availability.
Note:
The capture input pin also serves as the external clock input pin. The external clock mode cannot be
used in the capture mode.
Table 8.8-1 shows the relationship between the counter mode and the compare latch operation according to
the clear mask bit value.
Table 8.8-1 Relationship between Counter Mode and Compare Latch Operation
CCMSK TCMSK
0 0
0 1
1 0
1 1
194
Counter mode
At capture edge detection
Data load
Provided
Clear mode Provided
Not provided
Free-run mode Not provided
B
Data load to compare latch and counter clear
(provided/not provided)
Counter clear
Provided
Provided
Not provided
Not provided
enables the capture function to operate
enables the capture
B
At compare match
Data load Counter clear
Provided Provided
Not provided Not provided
Provided Provided
Not provided Not provided