Fujitsu F2MC-8L F202RA Hardware Manual page 165

Counter value
FF
H
80
H
00
H
COMR value
(FF
TIR bit
TPE bit
OE bit
PWM pin
When the bit to control the output pin (OE) is "0", the pin functions as a
general-purpose I/O port pin (P50).
*:
If the PWM compare register (COMR) value is changed during counter operation, the value
takes effect at the next cycle.
Notes:
• While interval timer functions are enabled (CNTR: TPE = 1), do not change the count clock cycle
(CNTR: P1, P0).
• When 00
count clock.
While interval timer functions are enabled, the output level of the PWM pin in the counter stop state
(CNTR: TPE = 0) is at "L" level.
Figure 7.6-2 Operations of an 8-bit PWM Timer
(FF
Comparison value
Timer cycle
Change of the COMR value
Clear in the program
)
H
is set to the COMR register, the output of the PWM pin is inverted in the cycle of the
H
CHAPTER 7 8-BIT PWM TIMER
)
Comparison value
H
(FF
80
H
H
(80 )
H
Time
) *
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