Fujitsu F2MC-8L F202RA Hardware Manual page 246

CHAPTER 10 EXTERNAL INTERRUPT CIRCUIT 1 (EDGE)
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Block Diagram of Circuitry Terminating at the Pins Associated with External Interrupt
Circuit 1
Figure 10.3-1 Block Diagram of Circuitry Terminating at the Pins Associated with External Interrupt Circuit 1
Note:
When the ON setting of the pull-up resistor is selected by the pull-up setting register, the pin state will
be "H" level (pull-up state) rather than Hi-Z during stop mode (SPL = 1). During a reset, however, the
pull-up is invalid and the pin remains at Hi-Z.
230
PDR PDR
PDR read
PDR read
(when read-modify-write is
performed)
Output
latch
PDR write
DDR
DDR write
Stop mode (SPL=1)
PUL read
PUL
PUL write
INT10,INT11
INT12
Output from
peripheral Output
from
Output occurring
peripheral
from peripheral
enable
External interrupt
enable
Stop mode
(SPL=1)
Pull-up
resistor
P-ch
Pins
P34/TO/INT10 P34/TO/INT10
N-ch
P35/INT11 P35/INT11
P36/INT12 P36/INT12