Fujitsu F2MC-8L F202RA Hardware Manual page 113

Table 4.5-3 Functions of Port 5 Registers
Register
Data
name
0
Port 5 data
register
(PDR5)
1
0
Port 5 data
direction
register
(DDR5)
1
R/W : Readable/Writable
X : Undefined
● Port 5 pull-up setting register (PUL5)
When the ON setting of the pull-up resistor is selected by using the pull-up setting register, the pin state
will be "H" level (pull-up state) instead of Hi-Z during stop (SPL = 1). During a reset, however, the pull-up
is invalid and the pin remains at Hi-Z.
Address
bit7
0072
H
R/W : Readable/Writable
: Unused
: Initial value
When being
read
Output latch of "0" is
Pin state is "L" set and "L" level is
level. output to the pin in
output port mode.
Output latch of "1" is
Pin state is "H" set and the pin in
level. output port mode is
set at Hi-Z.
The pin is set to
function as an input
Input port pin pin with output
transistor operation
disabled.
The pin is set to
function as an output
Output port pin pin with output
transistor operation
enabled.
Figure 4.5-2 Pull-up Setting Register (PUL5)
bit6 bit5 bit4 bit3
When being
Read/Write
written
R/W
R/W
bit2 bit1 bit0
Initial value
-------0
PUL50
R/W
CHAPTER 4 I/O PORTS
Address
00012
H
0013
H
B
PUL50
0
P50 pull-up OFF
1
P50 pull-up ON
Initial value
-------X
B
-------0
B
97