Clock Control Registers - NXP Semiconductors QorIQ LS1028A Reference Manual

4.26.3 Diagram
7
Bits
R TA_BB
W
NONE 1
4.26.4 Fields
Field
7 TA_BB Power Supply Status:
TA_BB 0= Power supply is disabled or faulted.
1= Power supply is operating.
6-4 Reserved.
-
3 DDR Power Supplies (GVDD, VTT, MVREF) Status:
DDR 0= Power supplies are disabled or faulted.
1= Power supply are operating.
2 5V0 Power Supply Status:
P5V 0= Power supply is disabled or faulted.
1= Power supply is operating.
1 3V3 Power Supply Status:
P3V3 0= Power supply is disabled or faulted.
1= Power supply is operating.
0 VDD Power Supply Status:
PVDD 0= Power supply is disabled or faulted.
1= Power supply is operating.

4.27 Clock Control Registers

The clock control registers control programmable clock synthesizers used to supply
clocks to the processor and associated peripherals.
QorIQ LS1028A Reference Design Board Reference Manual, Rev. A, 02/2018
NXP Semiconductors
6 5 4
111
Confidential Proprietary
Chapter 4 Qixis Programming Model
3 2
DDR P5V
1 1
Function
1 0
P3V3 PVDD
1 1
85