Esdhc Interface - NXP Semiconductors QorIQ LS1028A Reference Manual

eSDHC interface

2.15 eSDHC interface
The LS1028A processor supports two enhanced secured digital host controllers
(eSDHC): eSDHC1 and eSDHC2. The LS1043 interposer can support only one SDHC
controller and it is connected to SDHC1.
The figure below shows the eSDHC1 and eSDHC2 connections in the LS1028ARDB.
EVDD
(3.3V/1.8V)
OVDD
(1.8V)
The LS1028ARDB eSDHC1 interface is connected to a secure digital (SD) connector
(P2) on board to support an SD card. For default- or high-speed of SD card, the eSDHC1
controller and the SD card operate at EVDD (3.3 V) power. However, in case the
eSDHC1 controller requires the ultra-high speed (UHS) of the SD card, the card and the
controller operates at 1.8 V. The EVDD switch (FPF1321UCX) changes the 3.3 V supply
to 1.8 V for the controller depending upon the value of SDHC_VSEL signal.
The following table describes EVDD switch output voltage depending upon the SD card
speed and SDHC_VSEL value.
SD card speed
Default or high speed
Ultra-high speed (UHS)
QorIQ LS1028A Reference Design Board Reference Manual, Rev. A, 02/2018
42
LS1028
SDHC1_CLK
SDHC1_CMD
SDHC1_DAT[3:0]
SDHC_VSEL
SDHC2_CLK
SDHC2_CMD
SDHC2_DAT[7:0]
SDHC2_DS
Figure 2-16. eSDHC architecture
Table 2-13. EVDD switch output voltage
SDHC_VSEL
0
1
Confidential Proprietary
PULL-UPS
TO EVDD
SD CARD
1V8
EVDD
SWITCH
1V8
PULL-UPS
TO 1V8
eMMC-8GB
MTFC8GAKAJCN-
1M WT
EVDD switch voltage
3.3 V
1.8 V
3V3
3V3
EVDD
3V3
NXP Semiconductors