Reset Control (Rst_Ctl) - NXP Semiconductors QorIQ LS1028A Reference Manual

Reset Control (RST_CTL)

The reset control register group handles reset behavior configuration and general
monitoring of resets.
4.31 Reset Control (RST_CTL)
4.31.1 Address
Register
RST_CTL 040h
4.31.2 Function
The RST_CTL register is used configure or trigger reset actions.
4.31.3 Diagram
Bits 7
R
W
ARST
CRST
00
4.31.4 Fields
Field
7-6 Reserved.
-
5-4 Reset Request (RESET_REQ_B) handling:
REQMD 00= Disabled - do nothing.
11= Normal - assert PORESET_B to DUT to begin normal reset sequence.
3 DDR Reset Lock:
DDRLK 0= Reset is asserted to the DDR DIMMs/devices normally.
QorIQ LS1028A Reference Design Board Reference Manual, Rev. A, 02/2018
88
6 5 4
REQMD
SW_RST_MODE
Table continues on the next page...
Confidential Proprietary
Offset
3 2
DDRLK
0
Function
1 0
RST
00 0
NXP Semiconductors