NXP Semiconductors QorIQ LS1028A Reference Manual page 38

I2C interface
From PCA 9848
The following table describes the devices available on each of the eight I2C1 channels.
I2C bus 7-bit address
(All) -
0x66
0x77
I2C1_CH0 0x50
0x51
0x57
QorIQ LS1028A Reference Design Board Reference Manual, Rev. A, 02/2018
38
3V3
I2C RCW
BootSeq
3V3
AT24C512C
Addr
0x50
I2C1_CH0
1V8
I2C1_CH1
3V3
I2C1_CH2
3V3
I2C1_CH3
Retimer #1
3V3
DS125DF111
I2C1_CH4
3V3
I2C1_CH5
3V3
I2C1_CH6
3V3
I2C1_CH7
Table 2-10. I2C1 bus device map
Device
I2C master
I2C slave
NXP PCA9848PWJ
Atmel AT24C512C-XHD-
B: 64 KB EEPROM
AT24C04C 512-byte
DDR4 SPD EEPROM
Atmel AT24C02C-XHM-B:
256-byte EEPROM
Table continues on the next page...
Confidential Proprietary
3V3 3V3
CFG_WP
DDR1 System ID
DDR1 uDIMM2
SPD
AT24C02C
Addr Addr
0x51 0x57
1V8 1V8
IDT NXP
VR500
5P49V5907
Addr
Addr
0x08
0x6A
3V3
VDD Current
INA220
Addr
0x40
3V3 VBAT
RTC
PCF2129AT
Addr
0x4C
DDR1 uDIMM2
Slot1: PCIe m.2
XFI Conn: FTLX1371D3-BCL
Slot2/3: PCIe/SATA m.2
Description
LS1028ARDB
CPLD
I2C bus multiplexer
(primary)
UEFI/ boot memory
SPD data
System ID
3V3
THERM_ALARM_B
Thermal
Monitor
SA56004ED
THERM_WARN_B
Addr
0x4C
Notes
I2C access to CPLD
BCSRs (registers).
Converts I2C1 bus into
eight channels
Provides I2C booting
option. Write protectable.
Stores SPD and
temperature data for
DDR4 SDRAM memory.
Write protectable.
Stores board-specific
data, such as MAC
addresses and serial
number/errata. Write
protectable.
NXP Semiconductors