Board Configuration 5 (Brdcfg5) - NXP Semiconductors QorIQ LS1028A Reference Manual

4.45.2 Function
The BRDCFG4 register controls general board configuration.
4.45.3 Diagram
Bits 7
R
PX1WD
W
RRST 0
4.45.4 Fields
Field
7 PCI Express M.2 Wireless disable (net CFG_PEX1_WDIS_B):
PX1WD 0= Board operates normally.
1= Board wireless shutdown requested.
6 PCI Express M.2 Wireless disable (net CFG_PEX2_WDIS_B):
PX2WD 0= Board operates normally.
1= Board wireless shutdown requested.
5 SATA DevSlp control (net SATAM2_3_DEVSLP):
SATASLP 0= SATA module operates normally.
1= SATA module enters sleep-mode.
4 EC1_CLK Enable (net EC1_125MHZ_EN):
ECCLK 0= Clock is enabled (default).
1= Clock is disabled.
3 DisplayPort Power Enable (net DP_PWR_EN):
DPPWR 0= DP_PWR is disabled.
1= DP_PWR is enabled (default).
2-0 Reserved.
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4.46 Board Configuration 5 (BRDCFG5)

QorIQ LS1028A Reference Design Board Reference Manual, Rev. A, 02/2018
NXP Semiconductors
6 5
PX2WD SATASLP ECCLK
0 0
Confidential Proprietary
Chapter 4 Qixis Programming Model
4 3 2
DPPWR
0 1
Function
1 0
000
103