NXP Semiconductors QorIQ LS1028A Reference Manual page 29

LS1028
0 / A
1 / B
2 / C
3 / D
SERDES
The LS1028A SerDes module support several protocols, which are assigned to dedicated
functions on the LS1028ARDB, as shown in the table below.
SerDes Lane
module
1 0 / A
1 / B
2 / C
3 / D
QorIQ LS1028A Reference Design Board Reference Manual, Rev. A, 02/2018
NXP Semiconductors
A
B
Figure 2-8. SerDes architecture
Table 2-4. SerDes assignments
Connectivity
Qualcomm AR8033 1 GbE PHY
NXP F104S8A QSGMII
Quad 1 GbE PHY
PCIe Gen 3 (8 Gbit/s)
PCIe Gen 3 (8 Gbit/s)
or
SATA 3.0 (6 Gbit/s)
Confidential Proprietary
Chapter 2 LS1028ARDB Functional Description
SGMII PHY
AR8033
x4
QSGMII PHY F104
PCIe M.2
PCIe M.2
PCIe or SATA based
SSD M.2
Key B
Port
1 x 1GbE RJ45 on SGMII MAC interface
4 x 1GbE RJ45 on QSGMII MAC interface
M.2 Key E slot for Wi-Fi cards
M.2 Key E slot for Wi-Fi cards
or
M.2 Key B slot for SATA based SSD cards
RJ-45 with
Transform
er
RJ-45 with
Transform
er
x4
Key-E (Wi-Fi)
Key-E (Wi-Fi)
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