NXP Semiconductors QorIQ LS1028A Reference Manual page 51

1. TEST_SEL_B is a static signal (constantly driven), unlike most other processor configuration signals.
All other configuration signals are static and unrelated to the processor. The following
table summarizes these configuration signals.
Table 2-20. Non-processor configuration settings
Configuration signal
CFG_XSPI_MAP
CFG_MEM_WP
CFG_MUX_UART2_SEL0,
CFG_MUX_uBUS1_UART_B
,
CFG_MUX_uBUS2_UART_B
CFG_MUX_uBUS1_SPI_B,
CFG_MUX_uBUS2_SPI_B
CFG_MUX_uBUS1_PWM_B,
CFG_MUX_uBUS2_PWM_B
DIP switches that are not listed in the above tables do not directly control board signals,
rather they alter the behavior of the system controller. See
complete details about DIP switches.
2.20.2 Reset sequencing
The system controller manages the reset sequencing during the system startup. After
successful power sequencing (all "power good" are reported from power supplies), reset
sequencer asserts the PORESET_B signal.
The reset sequencing (including device configuration) is described in the following table.
Controller Step
Reset sequencer 1
QorIQ LS1028A Reference Design Board Reference Manual, Rev. A, 02/2018
NXP Semiconductors
DIP switch CPLD register
SW1[8] BRDCFG0[6]
SW3[4] CTL[3]
SW2[6:5] BRDCFG3[5:4]
SW2[8] BRDCFG3[6]
SW2[7] BRDCFG3[7]
Table 2-21. Reset sequence
Action
Assert all resets.
Table continues on the next page...
Confidential Proprietary
Chapter 2 LS1028ARDB Functional Description
Description
Controls how XSPI_A chip-select 0 is connected
to devices/peripherals.
Allows/prevents write to SYSTEM ID, UEFI flash,
and DDR4 SPD.
Controls UART2 routing to RS232 transceiver
( DB9 connector P1A), mikroBUS1, or
mikroBUS2 module.
Controls routing of SPI3 to mikroBUS1 or
mikroBUS2 module
Controls routing of PWM to mikroBUS1 or
mikroBUS2 module
Switch configuration
Description
LS1028A PORESET_B is asserted if not already
asserted.
Device resets are asserted:
• RST_QSGMII_B
• RST_1GETH_B
• PEXM2_1_PERST0_B
• PEXM2_2_PERST0_B
• SATAM2_3_PERST0_B
• RST_IEEE1588_B
• RST_I2C_B
• RST_MEM1_3V3_B
for
51