Dut Configuration 11 (Dutcfg11) - NXP Semiconductors QorIQ LS1028A Reference Manual

4.51.3 Diagram
7
Bits
R
W
RRST
4.51.4 Fields
Field
7-3 Reserved.
-
2-1 Controls cfg_svr[0:1] (note the bit order).
SVR01
0 Controls processor pin TESTSEL_B.
TEST NOTE: Unlike all other DUTCFG bits, TESTSEL is always driven.

4.52 DUT Configuration 11 (DUTCFG11)

4.52.1 Address
Register
DUTCFG11 06Bh
4.52.2 Function
The DUTCFG11 register is used to control the CFG_ENG_USE[7:0] signals. The
function of these bits are defined by silicon engineers for special use.
QorIQ LS1028A Reference Design Board Reference Manual, Rev. A, 02/2018
NXP Semiconductors
6 5 4
11111
Confidential Proprietary
Chapter 4 Qixis Programming Model
3 2
SVR01
SW_SVR
Function
Offset
1 0
TEST
1
109