Qoriq Ls1028A Reference Design Board Reference Manual, Rev. A, 02/2018 - NXP Semiconductors QorIQ LS1028A Reference Manual

Core Management Space Registers
4.52.3 Diagram
7
Bits
R
ENGUSE0
W
RRST SW_ENGUS
E0
4.52.4 Fields
Field
7 ENG_USE0: Differential Clock Mode (cfg_enguse0):
ENGUSE0 0= Processor uses differential SYSCLK_P/SYSCLK_N input.
1= Reserved.
6-0 Reserved.
-
4.53 Core Management Space Registers
The core management address/data registers allow access to internal Qixis control
registers, primarily the direct switch access registers which allow easy reporting of board
configuration.
For RDB systems, only the following are defined:
4.53.1
Address Name
00 SW# Number of configuration switches.
01..0F SWn Image of configuration switch #n.
Ranges not listed are reserved.
A standard use of the CMSA/CMSD port is to read the state of configuration switches,
for example:

QorIQ LS1028A Reference Design Board Reference Manual, Rev. A, 02/2018

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6 5 4
Confidential Proprietary
3 2
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Function
Definition
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