NXP Semiconductors QorIQ LS1028A Reference Manual page 12

Board features
LS1028ARDB feature
Processor Two-core processor
DDR memory DDR4
High-speed serial ports One four-lane SerDes
(SerDes)
eSDHC eSDHC1
eSDHC2
SPI SPI3
Octal SPI (XSPI) One XSPI (XSPI A)
I2C Six I2C interfaces
Serial ports Two UART ports
(UART1 and UART2)
QorIQ LS1028A Reference Design Board Reference Manual, Rev. A, 02/2018
12
Table 1-3. LS1028ARDB features
Specification
®
Two Arm
• Based on 64-bit ARMv8 architecture
• Up to 1.3 GHz operation
• Single-threaded cores with 48 KB L1 instruction cache and 32 KB
L1 data cache
• Arranged as a single cluster of two cores sharing a single 1 MB L2
cache
NOTE: For more details on the LS1028A processor, see QorIQ LS1028A
Family Reference Manual.
• Five onboard 1G x8 discrete memory modules (Four data byte lanes
+ ECC)
• 32-bit data and 4-bit ECC
• One chip select
• Data transfer rates of up to 1.6 GT/s
• Single-bit error correction and double-bit error detection ECC (4-bit
check word across 32-bit data)
• Lane 0: Supports one 1 GbE RJ45 SGMII, connected through the
Qualcomm AR8033 PHY
• Lane 1: Supports four 1.25 GbE RJ45 QSGMII, each connected
through the NXP F104S8A PHY
• Lane 2: Connects to one PCIe M.2 Key-E slot to support PCIe Gen3
(8 Gbit/s) cards
• Lane 3: Connects to one PCIe M.2 Key-E slot and one SATA M.2
Key-B slot through a register mux to support either PCIe Gen 3 (8
Gbit/s) or SATA Gen 3 cards (6 Gbit/s) at a time
Supports a secure digital (SD) connector for connecting an external SD
3.0 card
• Onboard 8 GB eMMC memory (MTFC8GAKAJCN) supporting
Connects to two mikroBUS™ sockets to support mikro-click modules,
such as Bluetooth 4.0, 2.4 GHz IEEE 802.15.4 radio transceiver, near field
communications (NFC) controller
• One 256 MB onboard XSPI serial NOR flash memory
• One 512 MB onboard XSPI serial NAND flash memory
• Supports a QSPI emulator for offboard QSPI emulation
• All system devices are accessed via I2C1, which is multiplexed on
I2C multiplexer PCA9848 to isolate address conflicts and reduce
capacitive load
• I2C1 is used for EEPROMs, RTC, INA220 current-power sensor,
thermal monitor, PCIe/SATA M.2 connectors and mikro-click
modules 1 and 2
• UART1 supports RS-232 levels of up to 1 Mbit/s data rate on a DB9
male connector. LTC8204 RS232 transceiver is used for interface
conversion. Hardware handshaking is not supported.
• UART2 can be used to interface with either mikro-click modules or
RS-232 transceiver LTC2804 (similar to UART1). The selection can
be controlled from FPGA.
Table continues on the next page...
Confidential Proprietary
Description
®
Cortex - A72 processor cores:
• x1, x4, and x8 I/Os
• SDR/DDR modes up to 52 MHz clock speed
• HS200/HS400 modes
NXP Semiconductors