Duart Interface - NXP Semiconductors QorIQ LS1028A Reference Manual

Reference design board
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DUART interface

The following table describes the three-pad arrangement that is required to select either
Type E connector or Type B connector on the LYNX36 SerDes lane 3.
M.2 connector select
1
Type E
Type B
1. By default, registers and capacitors are mounted for the M.2 Key E connector (J18).
The M.2 Key E connectors J16 and J18 have 1x4-pin headers J17 and J19, respectively,
for coexistence signals. Since, co-existence signal assignments on M.2 connectors is
vendor dependant, refer to the vendor-specific documentation of M.2 modules for details.
2.10 DUART interface
The LS1028A device provides one instance of the DUART block, which support two 2-
wire serial ports with no hardware flow control. On the LS1028ARDB board, the
DUART ports connect to an RS-232 transceiver (Linear Technology LTC2804-1), which
translates the UART1 and UART2 signals to RS-232 levels. The RS-232 signals of
UART1 and UART2 are provided on dual DB9 male connector (DTE configuration) to
provide convenient communication channels to both terminal and host computers.
It is recommended to use UART1 as a debug port. The LTC2804-1 transceiver can
support 1 Mbit/s data rate on each of the serial ports.
The figure below shows the LS1028ARDB DUART connections.
QorIQ LS1028A Reference Design Board Reference Manual, Rev. A, 02/2018
34
Table 2-8. Register configuration
Signal name
PEXM2_2_REFCLK_P
PEXM2_2_REFCLK_N
PEXM2_2_PET_P
PEXM2_2_PET_N
PEXM2_2_PER_P
PEXM2_2_PER_N
PEXM2_2_REFCLK_P
PEXM2_2_REFCLK_N
PEXM2_2_PET_P
PEXM2_2_PET_N
PEXM2_2_PER_P
PEXM2_2_PER_N
Confidential Proprietary
Mount register/capacitor
R214
R213
C409
C410
R216
R215
R223
R222
C423
C422
C420
C421
Values
0 Ω
0 Ω
0.22 μF ±10%
0.22 μF ±10%
0 Ω
0 Ω
0 Ω
0 Ω
0.01 μF ±10%
0.01 μF ±10%
0.01 μF ±10%
0.01 μF ±10%
NXP Semiconductors

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