Sun Microsystems Enterprise 3500 System Reference Manual page 90

5.2.3 Clocks
The clock subsystem generates the clocks for the entire system. The base clock is
synthesized and then divided into various frequencies. The base clocks are then
"fanned-out" and driven to the centerplane by an array of driver chips. Two
processor clocks and one system clock go to each of the board slots on the
centerplane.
5.2.4 Reset logic
The reset logic consists of four subcircuits for controlling the system reset and error
state:
Manual reset
System reset
XIR
System error
5.2.5 Removing a Clock+ Board
The clock+ board slot is located in the system rear, to the right of the board slots
(
FIGURE 5-2
Caution – The clock+ board is not hot pluggable. Do not remove the clock+ board
until the system has been halted and powered off.
You must halt the operating system before turning off the system power. See
Chapter 11 "Powering Off and On" for this procedure.
Caution – To avoid damaging internal circuits, do not disconnect or connect any
cable while power is applied to the system.
1. Halt the operating system and turn off the system power. See Chapter 11
"Powering Off and On," for this procedure.
2. Unfasten cable connectors from the board front panel and set them aside.
Label cables to identify them for reconnection later.
3. Loosen the two captive screws securing the board to the system card cage.
5-4 Sun Enterprise 3500 System Reference Manual • August 2001
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