Comtech EF Data CDM-710 Installation And Operation Manual page 87

CDM-710 Broadcast Satellite Modem
Front Panel Operation
Menu Mnemonic
Encoder FIFO Empty
Encoder FIFO Full
ASI TrxSlot 1 DR > +110PPM
ASI TrxSlot 2 DR > +110PPM
ASI TrxSlot 1 DR <-110PPM
ASI TrxSlot 2 DR < -110PPM
SERDES Parity Errors
+1.5V PSU Demodulator Card
FPGA Load Demodulator Card
Demod Unlocked
DSNG Sync Error
FPGA Temp Demodulator Card
BER limit Exceeded
AGC Level Out of Range
Eb/No limit exceeded
Demodulator Synth 1 PLL
Demodulator Synth 2 PLL
Demodulator SERDES Dmd->Framer
Demodulator SERDES Framer > FEC1
Demodulator SERDES Framer > FEC2
FAST option not installed
MPEG-TS Check Failed
ASI1 Rx PLL FIFO Empty
ASI1 Rx PLL FIFO Full
ASI1 Rx PLL Lower Limit Reached
ASI1 Rx PLL Upper Limit Reached
ASI2 Rx PLL FIFO Empty
ASI2 Rx PLL FIFO Full
ASI2 Rx PLL Lower Limit Reached
ASI2 Rx PLL Upper Limit Reached
Rx DCM Unlocked
ASI1 Rx SERDES Parity Error
ASI1 Rx SERDES Unlock
ASI2 Rx SERDES Parity Error
ASI2 Rx SERDES Unlock
HSSI1 Rx Buffer Underflow
HSSI1 Rx Buffer Overflow
HSSI2 Rx Buffer Underflow
HSSI2 Rx Buffer Overflow
SERDES Par Framer -> Intf1
SERDES Par Framer ->Intf2
Rx Clock Source Interface 1
Rx Clock Source Interface 2
Demodulator Faults / Alarms
Transmit Encoder FIFO is empty
Transmit Encoder FIFO is full
Transmit data rate exceeds nominal by >+100PPM Slot 1
Transmit data rate exceeds nominal by >+100PPM Slot 1
Transmit data rate exceeds nominal by <-100PPM Slot 1
Transmit data rate exceeds nominal by <-100PPM Slot 1
SERDES parity errors have been detected
1.5 Vdc regulator exceeds +/- 5%
Demod FPGA not loading
Demodulator is not locked
DSNG synchronization error
Demod FPGA outside temperature range
Bit error rate limit exceeded
AGC level is out of range
EB/No limit has been exceeded
Demodulator Synth 1 PLL fault
Demodulator Synth 2 PLL fault
Demodulator SERDES fault
Demodulator SERDES fault
Demodulator SERDES fault
FAST option for selected feature has not been installed
MPED-TS error has been detected
ASI Rx FIFO empty Slot 1
ASI Rx FIFO full Slot 1
ASI Rx PLL Lower Limit Reached Slot 1
ASI Rx PLL Upper Limit Reached Slot 1
ASI Rx FIFO empty Slot 2
ASI Rx FIFO full Slot 2
ASI Rx PLL Lower Limit Reached Slot 2
ASI Rx PLL Upper Limit Reached Slot 2
Demod Digital Clock Manager unlocked
ASI Rx SERDES parity error Slot 1
ASI Rx SERDES not locked Slot 1
ASI Rx SERDES parity error Slot 2
ASI Rx SERDES not locked Slot 2
HSSI Rx buffer has underrun Slot 1
HSSI Rx buffer has overflowed Slot 1
HSSI Rx buffer has underrun Slot 2
HSSI Rx buffer has overflowed Slot 2
SERDES parity error detected on framer FPGA interface 1
SERDES parity error detected on framer FPGA interface 2
Rx Clock Source fault Interface 1
Rx Clock Source fault Interface 2
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MN/CDM710.IOM
Description
Revision 9