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2.15 Multiple interrupts Usage
2.15.1 Overview of the Multiple interrupts usage
The following is an overview of the multiple interrupts usage.
(1) Interrupt control
Descriptions are given here regarding how to enable or disable maskable interrupts and how to set the
priority to be accepted. What is described here does not apply to non-maskable interrupts.
Enable or disable a non-maskable interrupt using the interrupt enable flag (I flag), interrupt priority
level selection bit, or processor interrupt priority level (IPL). Whether an interrupt request is present or
absent is indicated by the interrupt request bit. The interrupt request bit and the interrupt priority level
select bit are located in the interrupt control register of each interrupt. Also, the interrupt enable flag (I
flag) and the IPL are located in the flag register (FLG).
Figure 2.15.1 shows the memory map of the interrupt control registers, and Figure 2.15.2 shows the
interrupt control registers.
Figure 2.15.1. Memory map of the interrupt control registers
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
0041
Key input interrupt control register (KUPIC)
16
UART2 receive/ACK interrupt control register (S2RIC)
0042
16
0043
16
UART1/3 Bus collision interrupt control register (S13BCNIC)
INT1 interrupt control register (INT1IC)
0044
16
0045
16
Timer A1 interrupt control register (TA1IC)
0046
USB Endpoint 0 interrupt control register (EP0IC)
16
0047
Timer A2 interrupt control register (TA2IC)
16
0048
UART1 receive/ACK/SSI1 interrupt control register (S1RIC)
16
0049
UART0/2 Bus collision interrupt control register (S02BCNIC)
16
UART0 receive/ACK/SSI0 interrupt control register (S0RIC)
004A
16
004B
16
AD conversion interrupt control register (ADIC)
DMA0 interrupt conrol register (DM0IC)
004C
16
004D
UART3 transmit/NACK interrupt control register (S3TIC)
16
004E
DMA1 interrupt control register (DM1IC)
16
004F
UART2 transmit/NACK interrupt control register (S2TIC)
16
0050
DMA2 interrupt control register (DM2IC)
16
UART1 transmit/NACK/SSI1 interrupt control register (S1TIC)
0051
16
0052
16
DMA3 interrupt control register (DM3IC)
0053
UART0 transmit/NACK/SSI0 interrupt control register (S0TIC)
16
0054
16
Timer A0 interrupt control register (TA0IC)
0055
UART3 receive/ACK interrupt control register (S3RIC)
16
0056
USB suspend interrupt control register (SUSPIC)
16
Timer A3 interrupt control register (TA3IC)
0057
16
0058
USB resume interrupt control register (RSMIC)
16
0059
16
Timer A4 interrupt control register (TA4IC)
005A
16
USB reset interrupt control register (RSTIC)
005B
16
USB SOF interrupt control register (SOFIC)
005C
USB Vbus detect interrupt control register (VBDIC)
16
USB function interrupt control register (USBFIC)
005D
16
005E
INT2 interrupt control register (INT2IC)
16
INT0 interrupt control register (INT0IC)
005F
16
page 267 of 354
2. Multiple Interrupts
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