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M30245 Group
Transition of stop mode, wait mode
All oscillators stopped
Stop mode
All oscillators stopped
Stop mode
All oscillators stopped
Stop mode
Transition of normal mode
CM06 = "1"
Main clock is oscillating
Sub clock is oscillating
High-speed mode
BCLK : f(X
IN
CM07 = "0" CM06 = "0"
CM17 = "0" CM16 = "0"
Medium-speed mode
(divided-by-4 mode)
BCLK : f(X
IN
CM07 = "0" CM06 = "0"
CM17 = "1" CM16 = "0"
CM04 = "0"
CM07 = "0" CM06 = "0"
CM17 = "0" CM16 = "0"
Medium-speed mode
CM06 = "0"
(divided-by-4 mode)
(Notes 1,3)
CM07 = "0" CM06 = "0"
CM17 = "1" CM16 = "0"
Note 1: Switch clock after oscillation of main clock is sufficiently stable.
Note 2: Switch clock after oscillation of sub clock is sufficiently stable.
Note 3: Change CM06 after changing CM17 and CM16.
Note 4: Transit in accordance with arrow.
Figure 2.16.1. State transition diagram of power control mode
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
CM10 = "1"
Medium-speed mode
(divided-by-8 mode)
Interrupt
Interrupt
High-speed/medium-
CM10 = "1"
CM10 = "1"
Low-speed/low power
Interrupt
Main clock is oscillating
Sub clock is stopped
Medium-speed mode
(divided-by-8 mode)
BCLK : f(X
)/8
IN
CM07 = "0" CM06 = "1"
CM04 = "1"
CM04 = "0"
(Notes 1, 3)
Medium-speed mode
(divided-by-2 mode)
)
BCLK : f(X
)/2
IN
CM07 = "0" CM06 = "0"
CM17 = "0" CM16 = "1"
Medium-speed mode
(divided-by-16 mode)
)/4
BCLK : f(X
)/16
IN
CM07 = "0" CM06 = "0"
CM17 = "1" CM16 = "1"
Main clock is oscillating
Sub clock is stopped
Medium-speed mode
High-speed mode
(divided-by-2 mode)
BCLK : f(X
)
BCLK : f(X
IN
CM07 = "0" CM06 = "0"
CM17 = "0" CM16 = "1"
Medium-speed mode
(divided-by-16 mode)
BCLK : f(X
)/4
BCLK : f(X
IN
CM07 = "0" CM06 = "0"
CM17 = "1" CM16 = "1"
page 275 of 354
Reset
WAIT
instruction
Interrupt
WAIT
instruction
speed mode
Interrupt
WAIT
instruction
dissipation mode
Interrupt
Normal mode
(Refer to the following for the transition of normal mode.)
Medium-speed mode
(divided-by-8 mode)
BCLK : f(X
)/8
IN
CM07 = "0"
CM06 = "1"
CM04 = "1"
CM07 = "1" (Note 2)
)/2
IN
CM05 = "1"
CM07 = "0" (Note 1)
CM06 = "0" (Note 3)
)/16
IN
2. Power Control
CPU operation stopped
Wait mode
CPU operation stopped
Wait mode
CPU operation stopped
Wait mode
CM07 = "0" (Note 1)
CM06 = "1"
Main clock is oscillating
Sub clock is oscillating
Low-speed mode
CM07 = "0"
(Note 1, 3)
BCLK : f(X
CIN
CM07 = "1"
CM07 = "1"
(Note 2)
CM05 = "0"
CM05 = "1"
Main clock is stopped
Sub clock is oscillating
Low power dissipation mode
BCLK : f(X
CIN
CM07 = "1"
)
)
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