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M30245 Group
Setting watchdog timer control register
b7
0 0
Setting watchdog timer start register
b7
Cancel protect register
b7
Software reset
b7
Figure 2.12.4. Set-up procedure of watchdog timer interrupt (watchdog timer interrupt)
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
b0
Watchdog timer control register [Address 000F
WDC
Reserved bit
Must always be "0"
Prescaler select bit
0 : Divided by 16
1 : Divided by 128
b0
Watchdog timer start register [Address 000E
WDTS
The watchdog timer is initialized and starts counting with a write instruction to
this register. The watchdog timer value is always initialized to "7FFF
regardless of the value written.
Generating watchdog
timer interrupt
b0
Protect register [Address 000A
0
1
PRCR
Enables writing to processor mode register 0 and 1 (addresses 0004
0005
)
16
1: Write-enabled
Reserved bit
b0
Processor mode register 0 [Address 0004
1
PM0
Software reset bit
The device is reset when this bit is set to "1".
The value of this bit is "0" when read.
page 257 of 354
]
16
]
16
]
16
]
16
2. Watchdog Timer
"
16
and
16
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