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2.9.9 Method of A/D Conversion (10-bit mode)
(1) The A/D converter compares the reference voltage (Vref) generated internally based on the
contents of the successive comparison register with the analog input voltage (V
the analog input pin. The comparison result is stored in the successive comparison register
and then V
curs, the A/D converter carries out the following:
1. Fixes bit 9 of the successive comparison register.
2. Fixes bit 8 of the successive comparison register.
3. Fixes bit 7 through bit 0 of the successive comparison register.
Vref is generated based on the latest content of the successive comparison register. Table
2.9.8 shows the relationship of the successive comparison register contents and Vref. Table
2.9.9 shows how the successive comparison register and Vref vary while A/D conversion is in
progress. Figure 2.9.18 shows theoretical A/D conversion characteristics.
Table 2.9.8. Relationship of the successive comparison register contents and Vref
Successive approximation register : n
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
is converted to digital value (successive comparison method). If a trigger oc-
IN
Compares Vref with V
register are "1000000000
Bit 9 of the successive comparison register varies depending on the comparison re-
sult as follows.
If Vref < V
, then "1" is assigned to bit 9.
IN
If Vref > V
, then "0" is assigned to bit 9.
IN
Sets bit 8 of the successive comparison register to "1", then compares Vref with V
Bit 8 of the successive comparison register varies depending on the comparison
result as follows:
If Vref < V
, then "1" is assigned to bit 8.
IN
If Vref > V
, then "0" is assigned to bit 8.
IN
Carries out step 2 above on bit 7 through bit 0.
After bit 0 is fixed, the contents of the successive comparison register (conversion
result) are transmitted to AD register i.
0
1 to1023
page 231 of 354
: [In this instance, the contents of the successive comparison
IN
" (default).]
2
V
1024
2. A/D Converter
Vref (V)
0
V
REF
REF
x
n
–
2048
) input from
IN
.
IN
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