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M30245 Group
Example of wiring
Example of operation
"1"
Receive enable
bit (RE)
"0"
"1"
Transmit enable
bit (TE)
"0"
"1"
Transmit buffer
empty flag (Tl)
"0"
"H"
SSi
"L"
CLKi
SRxDi
"1"
Receive complete
flag (Rl)
"0"
"1"
Receive interrupt
request bit (IR)
"0"
Shown in ( ) are bit symbols.
The above timing applies to the following settings:
• External clock is selected.
• CLK polarity select bit = "0".
f
: frequency of external clock
EXT
Figure 2.5.17. Operation timing of reception in serial interface special function slave mode, with clock delay
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Microcomputer
SSi
CLKi
SR
Di
X
(1) Set SSi port to "L" by the output from the transmitter side IC port
(2) Reception enabled
(3) Start reception
Dummy data is set in UARTi transmit buffer register
Transferred from UARTi transmit buffer register to UARTi transmit register
D
D
D
D
0
1
2
3
Transferred from UARTi receive register
to UARTi receive buffer register
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(4) Reception is complete
(5) Read of reception data
1 / f
EXT
Reception data is taken in
D
D
D
D
D
D
D
4
5
6
7
0
1
Read out from UARTi receive buffer register
Cleared to "0" when interrupt request is accepted, or cleared by software
Make sure that the following conditions are met when
the CLKi pin input ="H" before data reception
• Transmit enable bit → "1"
• Receive enable bit → "1"
• Dummy data write to UARTi transmit buffer register
2. Serial Interface Special Function
Transmistter side IC
Port
CLK
T
D
X
D
D
D
D
D
2
3
4
5
6
7
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