Renesas M30245 Series User Manual page 290

M30245 Group
System clock control register 0 (Note 1)
b7 b6 b5 b4 b3
System clock control register 1 (Note 1)
b7 b6 b5 b4 b3
0
Figure 2.16.4. Power control-related registers
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
b2 b1 b0
Symbol
0 0
CM0
Bit Symbol
Reserved bit
CM02
CM03
CM04
CM05
CM06
CM07
Note 1: Set bit 0 of the protect register (address 000A
Note 2: Changes to "1" when changing to stop mode and at a reset.
Note 3: When entering power saving mode, main clock stops using this bit. When returning from
stop mode and operating in X
by itself, set system clock select bit (CM07) to "1" before setting this bit to "1".
Note 4: When inputting external clock, only clock oscillation buffer is stopped and clock input is
acceptable.
Note 5: If this bit is set to "1", X
so X becomes pulled up to Xout ("H") using the feedback resistor.
IN
Note 6: Set port Xc select bit (CM04) to "1", and stabilize the sub clock oscillating before setting to
this bit from "0" to "1". Do not write to both bits at the same time. Also, set the main clock
stop bit (CM05) to "0", and stabilize the main clock oscillating before setting this bit from
"1" to "0".
Note 7: This bit changes to "1", when changing from high-speed/medium mode to stop mode and at
reset. When shifting from low-speed/low power dissipation mode to stop mode, the value
before stop mode is retained.
Note 8: f is not included. Do not set to "1" when using low-speed or low power dissipation mode.
C32
Note 9: When the X
b2 b1 b0
Symbol
0 0
0
CM1
Bit Symbol
CM10
Reserved bit
CM15
CM16
CM17
Note 1: Set bit 0 of the protect register (address 000A
Note 2: This bit changes to "1", when changing from high-speed/medium mode to stop mode and at
reset. When shifting from low-speed/low power dissipation mode to stop mode, the value
before stop mode is retained.
Note 3: Can be selected when bit 6 of the system clock control register 0 (address 0006
If "1", division mode is fixed at 8.
Note 4: If this bit is set to "1", X
X turn high-impedance state.
COUT
page 279 of 354
Address
0006
16
Bit Name
Always set to "0"
WAIT peripheral function
0 : Do not stop in wait mode
clock stop bit
1 : Stop in wait mode (Note 8)
Xcin-Xcout drive capacity
0 : LOW
select bit (Note 2)
1 : HIGH
0 : I/O port
Port Xc select bit
1 : Xcin-Xcout generation
Main clock (Xin-Xout)
0 : On
stop bit (Note 3, 4, 5)
1 : Off
Main clock division select
0 : CM16 and CM17 valid
bit 0 (Note 7)
1 : Divide-by-8 mode
System clock select bit
0 : Xin, Xout
(Note 6)
1 : Xcin, Xcout
16
, set this bit to "0". When main clock oscillation is operating
IN
becomes "H". The built-in feedback resistor remains connected,
OUT
/X is used, set ports P8 and P8
CIN COUT 6
Address
0007
16
Bit Name
All clock stop control bit 0 : Clock on
(Note 4) 1 : All clocks off (stop mode)
Always set to "0"
0 : LOW
Xin-Xout drive capacity
1 : HIGH
select bit (Note 2)
b7 b6
Main clock division select
0 0 : No division mode
bit 1 (Note 3)
0 1 : Divide-by-2 mode
1 0 : Divide-by-4 mode
1 1 : Divide-by-16 mode
16
turns "H", and the built-in feedback resistor is cut off. X
OUT
When reset
48
16
Function R W
O O
O O
O O
O O
O O
O O
O O
) to "1" before writing to this register.
as the input ports without pull-up.
7
When reset
20
16
Function R W
O O
O O
O O
O O
O O
) to "1" before writing to this register.
) is "0".
16
CIN
2. Power Control
and