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M30245 Group
Example of wiring
Example of operation
Transfer clock
(1) Transmission enabled
"1"
Transmit
enable bit (TE)
"0"
"1"
Transmit buffer
empty flag (Tl)
"0"
"H"
CTSi
"L"
TxDi
Transmit
"1"
register empty
"0"
flag (TXEPT)
Transmit
"1"
interrupt request
"0"
bit (IR)
Shown in ( ) are bit symbols.
The above timing applies to the following settings :
• Parity is enabled.
• One stop bit.
• CTS function is selected.
• Transmit interrupt cause select bit = "1".
Figure 2.4.7. Operation timing of transmission in UART mode
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Microcomputer
T
Di
X
CTSi
Note: Since T
D
X
2
this pin needs pull-up resistance.
When confirming stop bit, stopped transfer clock once because CTS = "H"
Tc
Started transfer clock again to start transmitting immediately after confirming CTS = "L"
(2) Confirme CTS
(3) Start transmission
Data is set in UARTi transmit buffer register
Transferred from UARTi transmit buffer register to UARTi transmit register
Start
bit
ST
D
D
D
D
D
D
0
1
2
3
4
5
page 65 of 354
(Note)
pin is N-channel open drain,
(4) Confirme stop bit
(5) Start transmission
Stopped pulsing because transfer enable bit = "0"
Parity
Stop
bit
bit
D
D
P
SP
ST
D
D
D
6
7
0
1
2
Cleared to "0" when interrupt request is accepted, or cleared by software
Tc = 16 (n + 1) / fi or 16 (n + 1) / f
fi : frequency of BRGi count source (f
f
: frequency of BRGi count source (external clock)
EXT
n : value set to BRGi
Receiver side IC
R
D
X
Port
D
D
D
D
D
P SP
3
4
5
6
7
EXT
, f
, f
)
1
8
32
2. UART
ST
D
D
0
1
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