Operation Of Address Match Interrupt - Renesas M30245 Series User Manual

16-bit single-chip microcomputer
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2.13.2 Operation of Address Match Interrupt

The following is an operation of address match interrupt. Figure 2.13.4 shows the set-up procedure of
address match interrupt, and Figure 2.13.5 shows the overview of the address match interrupt handling
routine.
Operation (1) The address match interrupt handling routine sets an address to be used to cause the ad-
dress match interrupt register to generate an interrupt.
(2) Setting the address match enable flag to "1" enables an interrupt to occur.
(3) An address match interrupt occurs immediately before the instruction in the address indicated
by the address match interrupt register as a program is executed.
Setting address match interrupt register
(b23)
(b20)
(b19)
b7
b4
Setting address match interrupt enable register
b7
Figure 2.13.4. Set-up procedure of address match interrupt
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
(b16)
(b15)
b3
b0
b7
b0
Address match interrupt enable register [Address 0009
AIER
Address match interrupt 0 enable bit
1: Interrupt enabled
Address match interrupt 1 enable bit
1: Interrupt enabled
page 260 of 354
Address match interrupt register 0 [Address 0012
RMAD0
Address match interrupt register 1 [Address 0016
RMAD1
(b8)
b0
b7
Can be set to "00000
2. Address Match Interrupt
to 0010
16
16
to 0014
16
16
b0
" to "FFFFF
"
16
16
]
16
]
]

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