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M30245 Group
4.5 Releasing an External Bus (HOLD input and HLDA output)
The Hold feature is to relinquish the address bus, the data bus, and the control bus on M30245 side in line
with the Hold request from the bus master other than M30245 when the two or more bus masters share the
address bus, the data bus, and the control bus. The Hold feature is effective only in memory expansion
mode and microprocessor mode.
The sequence of using the Hold feature may be:
1. The external bus master turns the input level of the HOLD terminal to "L".
2. When M30245 becomes ready to relinquish buses, each bus becomes high-impedance state at the
falling edge of BCLK.
__________
3. The HLDA terminal becomes "L" at the rising edge of the next BCLK.
4. The external bus master uses a bus.
5. When the external bus master finishes using a bus, the external bus master returns the input level of
__________
the HOLD terminal to "H".
6. The output from HLDA terminal becomes "H" at the rising edge of the next BCLK.
7. Each bus returns from the high-impedance state to the former state at the falling edge of the next
BCLK.
As given above, each bus invariably gets in the high-impedance state while the HLDA output is "L". Also,
M30245 does not relinquish buses during a bus cycle. That is, if a Hold request comes in during a bus
__________
cycle, the HLDA output become "L" after that bus cycle finishes.
In the Hold state, the state of each terminal becomes as follows.
• Address bus A
High-impedance state. The case in which A
space) in microprocessor mode and in memory expansion mode too falls under this category.
• Data bus D
to D
0
High-impedance state. The case in which D
width) in microprocessor mode and in memory expansion mode too falls under this category.
_____
_____
________
• RD, WR, WRL, WRH, BHE
High-impedance state.
• ALE
An internal clock signal having the same phase as BCLK is output.
_______
_______
• CS0 to CS3
High-impedance state. The case in which ports are selected by the chip selection control register too
falls under this category.
Figure.4.5.1 shows an example of relinquishing external buses.
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
__________
__________
to A
0
19
15
________
________
page 347 of 354
__________
__________
to A
are used as ports P4
16
19
to D
are used as ports P1
8
15
4. External Buses
__________
to P4
(64K byte address
0
3
to P1
(8-bit external bus
0
7
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