Renesas M30245 Series User Manual page 106

M30245 Group
Example of wiring
Example of operation
(1) Output "L" at the receiver side IC
Transfer clock
"H"
Port
"L"
"1"
Transmit
enable bit (TE)
"0"
Transmit "1"
buffer empty
"0"
flag (Tl)
CLKi
TxDi
Transmit register
"1"
empty flag
"0"
(TXEPT)
"1"
Transmit
interrupt request
"0"
bit (IR)
Shown in ( ) are bit symbols.
The above timing applies to the following settings:
• Internal clock is selected.
• CLK polarity select bit = "0".
• Transmit interrupt cause select bit = "0".
Figure 2.5.8. Operation timing of transmission in serial interface special function master mode, without clock delay
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Microcomputer
Port
SSi
CLKi
T Di
X
(2) Transmission enabled
(3) Start transmission Tc
Data is set to UARTi transmit buffer register
Transferred from UARTi transmit buffer register to UARTi transmit register
T
CLK
D D D D D D
0 1 2 3 4 5
page 95 of 354
(4) Transmission is complete
(5) Transmit next data
D D D D D D
D D
0 1 2 3 4 5
6 7
Cleared to "0" when interrupt request is accepted, or cleared by software
Tc = T = 2(n + 1) / fi
CLK
fi: frequency of BRGi count source (f
n: value set to BRGi
2. Serial Interface Special Function
Receiver side IC
SS
CLK
SR D
X
D D D D D D D D
6 7 0 1 2 3 4 5
, f , f )
1 8 32
D D
6 7