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M30245 Group
2.16.4 Precautions in Power Control
(1) The processor does not switch to stop mode when the NMI pin is at "L" level.
(2) When returning from stop mode by hardware reset, RESET pin must be set to "L" level until
main clock oscillation is stabilized.
(3) When entering wait mode, insert a JMP.B instruction before a WAIT instruction. Do not ex-
ecute any instructions which can generate a write to RAM between the JMP.B and WAIT
instructions. Disable the DMA transfers, if a DMA transfer may occur between the JMP.B and
WAIT instructions. After the WAIT instruction, insert at least 4 NOP instructions. When enter-
ing wait mode, the instruction queue roadstead the instructions following WAIT, and depend-
ing on timing, some of these may execute before the microcomputer enters wait mode.
Program example when entering wait mode
Program Example:
(4) When entering stop mode, insert a JMP.B instruction immediately after executing an instruc-
tion which sets the CM10 bit in the CM1 register to "1", and then insert at least 4 NOP instruc-
tions. When entering stop mode, the instruction queue reads ahead the instructions following
the instruction which sets the CM10 bit to "1" (all clock stops), and, some of these may
execute before the microcomputer enters stop mode or before the interrupt routine for return-
ing from stop mode.
Program example when entering stop mode
Program Example:
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
JMP.B
L1:
FSET
WAIT
NOP
NOP
NOP
NOP
FSET
BSET
JMP.B
L2:
NOP
NOP
NOP
NOP
page 282 of 354
______
____________
L1
; Insert JMP.B instruction before WAIT instruction
I
;
; Enter wait mode
; More than 4 NOP instructions
I
CM10
; Enter stop mode
L2
; Insert JMP.B instruction
; More than 4 NOP instructions
2. Power Control
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