Xilinx Artix-7 FPGA AC701 Getting Started Manual
  1. Manuals
  2. Brands
  3. Xilinx Manuals
  4. Motherboard
  5. Artix-7 FPGA AC701
  6. Getting started manual

Xilinx Artix-7 FPGA AC701 Getting Started Manual

Evaluation kit (vivado design suite 2013.2)
Hide thumbs Also See for Artix-7 FPGA AC701:
Table of Contents

Advertisement

Quick Links

Artix-7 FPGA
AC701 Evaluation Kit
(Vivado Design Suite 2013.2)
Getting Started Guide
UG967 (v3.0) July 10, 2013

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the Artix-7 FPGA AC701 and is the answer not in the manual?

Questions and answers

Related Manuals for Xilinx Artix-7 FPGA AC701

Summary of Contents for Xilinx Artix-7 FPGA AC701

  • Page 1 Artix-7 FPGA AC701 Evaluation Kit (Vivado Design Suite 2013.2) Getting Started Guide UG967 (v3.0) July 10, 2013...

  • Page 2: Revision History

    (including loss of data, profits, goodwill, or any type of loss or damage suffered as a result of any action brought by a third party) even if such damage or loss was reasonably foreseeable or Xilinx had been advised of the possibility of the same.

  • Page 3: Table Of Contents

    ............. 2 Getting Started with the Artix-7 FPGA AC701 Evaluation Kit Introduction .
  • Page 4 AC701 Getting Started Guide UG967 (v3.0) July 10, 2013...

  • Page 5: Getting Started With The Artix-7 Fpga Ac701 Evaluation Kit

    The built-in self-test (BIST), the AMS 101 evaluation card usage, and the Artix-7 FPGA Base Targeted Reference Design (TRD) are featured in this getting started guide. X-Ref Target - Figure 1 UG967_01_111412 Figure 1: AC701 Evaluation Kit AC701 Getting Started Guide www.xilinx.com UG967 (v3.0) July 10, 2013...
  • Page 6 • Software and reference designs, demos, and documents to quickly get started • The BIST files (RDF0220) can be found at www.xilinx.com/ac701 in the Docs & Designs tab. • All user guides, board files, and tutorials are available as downloads from www.xilinx.com/ac701...

  • Page 7: Basic Hardware Bring-Up With Built-In Self-Test

    Basic Hardware Bring-up with Built-In Self-Test Introduction The BIST tests many of the features offered by the Artix-7 FPGA AC701 Evaluation Kit. The test is an available reference design for the AC701 Evaluation Kit and can be programmed into the FPGA via the JTAG interface.
  • Page 8 AC Power Adapter (12 VDC) • TeraTerm Pro or other terminal program • USB-UART drivers from SiLabs [Ref 1] • ISE® design tools or lab tools • Vivado Design Suite installed on host PC www.xilinx.com AC701 Getting Started Guide UG967 (v3.0) July 10, 2013...
  • Page 9 AC701 and the host PC (see Figure Connect the 12V adapter cable. Connect the USB-A to USB-micro-B (Digilent JTAG) cable to the USB-micro-B port on the AC701. Switch AC701 Power to ON. AC701 Getting Started Guide www.xilinx.com UG967 (v3.0) July 10, 2013...
  • Page 10 Run the downloaded executable UART-USB driver file, listed in Test Setup Requirements (see Figure 5). This enables UART-USB communications with a host PC. X-Ref Target - Figure 5 UG967_05_111412 Figure 5: UART Cable Driver Installation Dialog www.xilinx.com AC701 Getting Started Guide UG967 (v3.0) July 10, 2013...
  • Page 11 X-Ref Target - Figure 6 UG967_06_111412 Figure 6: Selecting the Cypress Driver in the Device Manager X-Ref Target - Figure 7 UG967_07_111412 Figure 7: Setting the Port for the Cypress Driver AC701 Getting Started Guide www.xilinx.com UG967 (v3.0) July 10, 2013...
  • Page 12 Docs & Designs tab. Unzip the design files to the C:\ directory. Open a Vivado Tcl shell: Start > All Programs > Xilinx Design Tools > Vivado 2013.2 > Vivado 2013.2 Tcl Shell Start the installed terminal program.

  • Page 13: Ams Bring-Up With The Ams101 Evaluation Card

    ADC feature. The AC701 Evaluation Kit also includes voltage, current and power monitoring for nine of the analog power supplies on the board. For evaluation of Xilinx Analog Mixed Signal (AMS) capability, these items in the kit are needed: •...
  • Page 14 The AMS101 evaluation card requires a Windows host PC to install the National Instruments LabVIEW run-time engine. Install the AMS101 evaluation installer: Open the Docs & Designs tab at: www.xilinx.com/ac701. b. In the example designs, install the AMS101 evaluation tool by unzipping the AC701 AMS evaluation installer files from 7 Series FPGA and Zynq®-7000 AP SoC...
  • Page 15 When loading the National Instruments LabView run-time engine, click OK to accept the license agreement. Running the setup program loads the AMS101 Evaluator GUI with the red Xilinx logo on the desktop. After the AMS Evaluator has successfully installed, restart the host PC.
  • Page 16 Implement the design to the Artix-7 XC7A200T -2 FB676 FPGA from the AC701 AMS design file xadc_eval_design_ac701_v1_0 previously downloaded. Open the ChipScope™ analyzer: Start > All Programs > Xilinx Design Tools > ISE Design Suite > ChipScope Pro Analyzer b. Click the Open_cable command and select OK.
  • Page 17 AMS Bring-up with the AMS101 Evaluation Card X-Ref Target - Figure 11 UG967_11_112712 Figure 11: AMS Evaluator Tool X-Ref Target - Figure 12 UG967_12_112712 Figure 12: XADC Fast Fourier Transform Result AC701 Getting Started Guide www.xilinx.com UG967 (v3.0) July 10, 2013...
  • Page 18 V , the 1.8V supply, the 3.3V supply, CCO_ADJ MGTAVCC and MGTAVTT. X-Ref Target - Figure 13 UG967_13_112712 Figure 13: Voltage, Current and Power Monitoring on AC701 Board Supplies www.xilinx.com AC701 Getting Started Guide UG967 (v3.0) July 10, 2013...

  • Page 19: Advanced Bring-Up With Base Targeted Reference Design

    125 MHz C2S1 Checker 128 bits at 125 MHz Generator Loopback Integrated Blocks Xilinx IP Third Party IP AXI ST (128 bits at 125 MHz) Control Path in FPGA On Board AXI MM (512 bits at 100 MHz) 50 MHz Domain...
  • Page 20 • Built-in hardware to monitor power by reading the TI UCD90120A power controller chip included on the AC701 evaluation board • Built-in hardware to monitor die temperature by way of a Xilinx Analog-to-Digital Converter www.xilinx.com AC701 Getting Started Guide UG967 (v3.0) July 10, 2013...
  • Page 21 A PC with PCIe v2.1 compliant slot. For a complete list of recommended machines, and all known issues, see the Artix-7 FPGA Base Targeted Reference Design Release Notes and Known Issues Master Answer Record at http://www.xilinx.com/ support/answers/53372.htm. Note: The PC could also have Fedora 16 Linux OS installed.
  • Page 22 Positions 1, 2, and 3 set configuration mode 001 – Master SPI 101 – JTAG X-Ref Target - Figure 15 SW15 Pin 1 Pin 1 UG967_15_040513 Figure 15: AC701 Board Switch and Jumper Locations www.xilinx.com AC701 Getting Started Guide UG967 (v3.0) July 10, 2013...
  • Page 23 16). The PCI Express specification allows for a smaller lane width endpoint to be installed into a larger lane width PCIe connector. X-Ref Target - Figure 16 Figure 16: AC701 Board Installed in a PCIe x16 Connector AC701 Getting Started Guide www.xilinx.com UG967 (v3.0) July 10, 2013...
  • Page 24 To avoid loose contact issues, make sure the connections are secure. Turn ON the SW15 switch, apply power to the system, insert the Fedora LiveDVD, and change the boot order to boot from the DVD. www.xilinx.com AC701 Getting Started Guide UG967 (v3.0) July 10, 2013...
  • Page 25 LED position 4: ON if the PCIe link is up Figure 18 shows the location of the status LEDs. X-Ref Target - Figure 18 LED Position 1 2 3 4 UG967_18_121812 Figure 18: GPIO LEDs Indicating TRD Status AC701 Getting Started Guide www.xilinx.com UG967 (v3.0) July 10, 2013...
  • Page 26 The lspci command displays the PCI and PCI Express buses of the PC. On the bus corresponding to the PCIe connector holding the AC701 board, look for the message: Memory controller: Xilinx Corporation Device 7042 This message confirms that the design programmed into the AC701 board is detected by the BIOS and the Fedora 16 OS.
  • Page 27 Advanced Bring-up with Base Targeted Reference Design Figure 20 shows an example of the output from the lspci command. The highlighted region shows that Xilinx device 7042 has been located by the BIOS on bus number 3 (03:00.0 = bus:dev.function). X-Ref Target - Figure 20...
  • Page 28 Right-click on the script (quickstart.sh), select Properties. In the Permission tab, check the Allow executing file as program box. The script is now executable. To run the script, double-click quickstart.sh and select Run in Terminal. www.xilinx.com AC701 Getting Started Guide UG967 (v3.0) July 10, 2013...
  • Page 29 The GUI showing driver installation options appears as shown in Figure Subsequent steps demonstrate the GUI operation by installing and removing drivers. Click Install. X-Ref Target - Figure 23 UG967_23_121812 Figure 23: Artix-7 FPGA Base TRD Driver Installation GUI AC701 Getting Started Guide www.xilinx.com UG967 (v3.0) July 10, 2013...
  • Page 30 The system monitor tab shows system power and temperature. The GUI also provides an LED indicator for DDR3 memory calibration. X-Ref Target - Figure 24 UG967_24_111312 Figure 24: Artix-7 FPGA Base TRD Control and Monitoring Interface www.xilinx.com AC701 Getting Started Guide UG967 (v3.0) July 10, 2013...
  • Page 31 The driver maintains a set of circular arrays to hold second-by-second sampling points of various statistics which are periodically collected by the performance monitor handler. The various GUI indicators and controls are detailed in Figure 25 Table AC701 Getting Started Guide www.xilinx.com UG967 (v3.0) July 10, 2013...
  • Page 32 Advanced Bring-up with Base Targeted Reference Design X-Ref Target - Figure 25 UG967_25_111312 Figure 25: Control and Monitoring Interface www.xilinx.com AC701 Getting Started Guide UG967 (v3.0) July 10, 2013...
  • Page 33 Power in Watt plotted for the VCCINT, GTVCC, VCCAUX, and Power statistics VCCBRAM rails Temperature Monitors the current die temperature Notes: 1. Items 2 through 5 are duplicated for each of the two datapaths. AC701 Getting Started Guide www.xilinx.com UG967 (v3.0) July 10, 2013...
  • Page 34 Click Start on Datapath-1 as shown in Figure 26. This enables the driver to start generating the data for Datapath-1. X-Ref Target - Figure 26 UG967_26_111312 Figure 26: Start Data Traffic from GUI www.xilinx.com AC701 Getting Started Guide UG967 (v3.0) July 10, 2013...
  • Page 35 Design Suite must be installed before proceeding with custom modifications. The design tools do not need to be installed on the same host PC in which the AC701 evaluation board is installed. AC701 Getting Started Guide www.xilinx.com UG967 (v3.0) July 10, 2013...
  • Page 36 Advanced Bring-up with Base Targeted Reference Design www.xilinx.com AC701 Getting Started Guide UG967 (v3.0) July 10, 2013...

  • Page 37: Appendix A: Additional Resources

    The Artix-7 FPGA AC701 Evaluation Kit product page: www.xilinx.com/ac701 The Artix-7 FPGA AC701 Evaluation Kit - Known Issues and Release Notes Master Answer Record AR# 51900 The Artix-7 FPGA Base Targeted Reference Design Release Notes and Known Issues...

  • Page 38: References

    WP350, Understanding Performance of PCI Express Systems References These websites provide supplemental material useful with this guide: USB-UART drivers from SiLabs: http://www.silabs.com/Support%20Documents/ Software/CP210x_VCP_Win_XP_S2K3_Vista_7.exe Fedora Project: fedoraproject.org Northwest Logic DMA Back End Core: www.nwlogic.com/packetdma www.xilinx.com AC701 Getting Started Guide UG967 (v3.0) July 10, 2013...

  • Page 39: Appendix B: Warranty

    For any breach by Xilinx of this limited warranty, the exclusive remedy of Customer and the sole liability of Xilinx shall be, at the option of Xilinx, to replace or repair the affected products, or to refund to Customer the price of the affected products. The availability of replacement products is subject to product discontinuation policies at Xilinx.
  • Page 40 Appendix B: Warranty www.xilinx.com AC701 Getting Started Guide UG967 (v3.0) July 10, 2013...

Table of Contents