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■ Time to Start of Interrupt Processing
The time required to start interrupt processing can be expressed as a maximum of "n + 6" cycles from the
start of the instruction currently executing when the interrupt was received, where "n" represents the
number of execution cycles in the instruction.
If the instruction includes memory access, or insufficient instructions are present, the corresponding
number of wait cycles must be added.
■ "PC" Values Saved for Interrupts
When an interrupt is accepted by the processor, those instructions in the pipeline that cannot be interrupted
in time will be executed. The remainder of the instructions will be canceled, and will not be processed after
the interrupt. The "EIT" processing sequence saves "PC" values to the system stack representing the
addresses of canceled instructions.
■ How to Use External Interrupts
The following programming steps must be set up to enable the use of external interrupts.
Figure 4.3-1illustrates the use of external interrupts.
FR family CPU
PS
INT
OK
(1) Enter values in the interrupt vector table (defined as data).
(2) Set up the "SSP" values.
(3) Set up the table base register (TBR) values.
(4) Within the interrupt controller, enter the appropriate level for the "ICR" corresponding to interrupts
from the peripheral from which the interrupt will originate.
(5) Initialize the peripheral function that requests the occurrence of the interrupt, and enable its interrupt
function.
(6) Set up the appropriate value in the "ILM" field in the "PS".
(7) Set the "I" flag to "1".
Figure 4.3-1 How to Use External Interrupts
SSP USP
(2)
I
ILM
S
(7)
(6)
AND
Comparator
CHAPTER 4 RESET AND "EIT" PROCESSING
Interrupt
controller
(2)
ICR#n
(4)
Peripheral
device
Interrupt
enable bit
(5)
Internal bus
39
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