8-Bit Timer/Counter Register Description - Atmel AT90PWM2 Manual

14.8

8-bit Timer/Counter Register Description

14.8.1 Timer/Counter Control Register A – TCCR0A
AT90PWM2/3/2B/3B
96
Figure 14-9. Timer/Counter Timing Diagram, with Prescaler (f
clk
I/O
clk
Tn
(clk /8)
I/O
TCNTn
TOVn
Figure 14-10 shows the setting of OCF0B in all modes and OCF0A in all modes except CTC
mode and PWM mode, where OCR0A is TOP.
Figure 14-10. Timer/Counter Timing Diagram, Setting of OCF0x, with Prescaler (f
clk
I/O
clk
Tn
(clk /8)
I/O
TCNTn OCRnx - 1
OCRnx
OCFnx
Figure 14-11 shows the setting of OCF0A and the clearing of TCNT0 in CTC mode and fast
PWM mode where OCR0A is TOP.
Figure 14-11. Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with Pres-
caler (f
clk_I/O
clk
I/O
clk
Tn
(clk /8)
I/O
TCNTn
(CTC)
OCRnx
OCFnx
Bit 7
COM0A1 COM0A0
Read/Write R/W
Initial Value 0
MAX - 1 MAX
OCRnx
OCRnx Value
/8)
TOP - 1 TOP
6 5 4
COM0B1 COM0B0
R/W R/W R/W
0 0 0
/8)
clk_I/O
BOTTOM
OCRnx + 1
BOTTOM
TOP
3 2 1
– – WGM01
R R R/W
0 0 0
BOTTOM + 1
/8)
clk_I/O
OCRnx + 2
BOTTOM + 1
0
WGM00 TCCR0A
R/W
0
4317I–AVR–01/08