Atmel AT90PWM2 Manual page 58

4317I–AVR–01/08
0x010 rjmp
0x011 rjmp
0x012 rjmp
0x013 rjmp
0x014 rjmp
0x015 rjmp
0x016 rjmp
0x017 rjmp
0x018 rjmp
0x019 rjmp
0x01A rjmp
0x01B rjmp
0x01C rjmp
0x01F rjmp
;
0x020RESET: ldi
0x021 out
0x022 ldi
0x023 out
0x024 sei
0x025 <instr>
... ... ...
When the BOOTRST Fuse is unprogrammed, the Boot section size set to 2K bytes and the
IVSEL bit in the MCUCR Register is set before any interrupts are enabled, the most typical and
general program setup for the Reset and Interrupt Vector Addresses in AT90PWM2/2B/3/3B is:
Address Labels Code
0x000 RESET: ldi
0x001 out
0x002 ldi
0x003 out
0x004 sei
0x005 <instr>
;
.org 0xC01
0xC01 rjmp
0xC02 rjmp
... ...
0xC1F rjmp
When the BOOTRST Fuse is programmed and the Boot section size set to 2K bytes, the most
typical and general program setup for the Reset and Interrupt Vector Addresses in
AT90PWM2/2B/3/3B is:
Address Labels Code
.org 0x001
0x001 rjmp
0x002 rjmp
... ...
0x01F rjmp
TIM0_COMPA ; Timer0 Compare A Handler
TIM0_OVF ; Timer0 Overflow Handler
ADC ; ADC Conversion Complete Handler
EXT_INT1 ; IRQ1 Handler
SPI_STC ; SPI Transfer Complete Handler
USART_RXC ; USART, RX Complete Handler
USART_UDRE ; USART, UDR Empty Handler
USART_TXC ; USART, TX Complete Handler
EXT_INT2 ; IRQ2 Handler
WDT ; Watchdog Timer Handler
EE_RDY ; EEPROM Ready Handler
TIM0_COMPB ; Timer0 Compare B Handler
EXT_INT3 ; IRQ3 Handler
SPM_RDY ; Store Program Memory Ready Handler
r16, high(RAMEND); Main program start
SPH,r16 ; Set Stack Pointer to top of RAM
r16, low(RAMEND)
SPL,r16
; Enable interrupts
xxx
...
Comments
r16,high(RAMEND); Main program start
SPH,r16 ; Set Stack Pointer to top of RAM
r16,low(RAMEND)
SPL,r16
; Enable interrupts
xxx
PSC2_CAPT ; PSC2 Capture event Handler
PSC2_EC ; PSC2 End Cycle Handler
... ;
SPM_RDY ; Store Program Memory Ready Handler
Comments
PSC2_CAPT ; PSC2 Capture event Handler
PSC2_EC ; PSC2 End Cycle Handler
... ;
SPM_RDY ; Store Program Memory Ready Handler
AT90PWM2/3/2B/3B
59