Atmel AT90PWM2 Manual page 216

Internal
Manchester
Clock
Resynchronize
Internal
Manchester
Clock
Start Bit
Manchester
Data
Counter
Start Bit
Overflow
N1
Manchester
Decoder
Counter
Edge Detection
Space
Internal
Manchester
Clock
4317I–AVR–01/08
Figure 19-5. Manchester Frame error detection
Bit 1 Bit 2
front shift
N2
N2/2
N1/2
N2/4
Transition outside
the detect window
Note: Counter Overflow = MBURR[H:L]
When a Manchester framing error is detected the FEM bit and RxC bit are set at the same time.
This allows the application to execute the reception complete interrupt subroute when this error
conditon is detected.
When a Manchester framing error is detected, the EUSART receiver immediately enters in a
new start bit detection phase. Thus when a Manchester framing error is detected within a frame,
the receiver will process the rest of the frame as a new incomming frame and generate other
FEM errors.
N3
AT90PWM2/3/2B/3B
Start Bit Bit 1
Start Bit
N1 N2
The counter reaches the counter overflow
value without reaching a manchester edge
Bit 2
back shift
Framing Error
N3
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