Atmel AT90PWM2 Manual page 154

DT0
PSCOUTn0
PSCOUTn1
PSCn Input A
PSCOUTn0
PSCOUTn1
PSCn Input B
16.18 PSC Input Mode 14: Fixed Frequency Edge Retrigger PSC and Disactivate Output
4317I–AVR–01/08
Figure 16-33. PSC behaviour versus PSCn Input A in Mode 9
OT0
DT1
OT1
The output frequency is not modified by the occurence of significative edge of retriggering input.
Only the output is disactivated when significative edge on retriggering input occurs.
Note: In this mode the output of the PSC becomes active during the next ramp even if the Retrig-
ger/Fault input is actve. Only the significative edge of Retrigger/Fault input is taken into account.
Figure 16-34. PSC behaviour versus PSCn Input B in Mode 9
DT0 OT0
DT1
OT1
The retrigger event is taken into account only if it occurs during the corresponding On-Time.
DT0 OT0
DT1 OT1
DT0 OT0
DT1 OT1
AT90PWM2/3/2B/3B
DT0 OT0
DT1
DT0 OT0
DT1
OT1
OT1
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