Atmel AT90PWM2 Manual page 170

16.26 PSC2 Specific Register
16.26.1 PSC 2 Output Matrix – POM2
16.26.2 PSC0 Interrupt Mask Register – PIM0
16.26.3 PSC1 Interrupt Mask Register – PIM1
4317I–AVR–01/08
Bit 7
POMV2B3 POMV2B2
Read/Write R/W
Initial Value 0
• Bit 7 – POMV2B3: Output Matrix Output B Ramp 3
This bit gives the state of the PSCOUT21 (and/or PSCOUT23) during ramp 3
• Bit 6 – POMV2B2: Output Matrix Output B Ramp 2
This bit gives the state of the PSCOUT21 (and/or PSCOUT23) during ramp 2
• Bit 5 – POMV2B1: Output Matrix Output B Ramp 1
This bit gives the state of the PSCOUT21 (and/or PSCOUT23) during ramp 1
• Bit 4 – POMV2B0: Output Matrix Output B Ramp 0
This bit gives the state of the PSCOUT21 (and/or PSCOUT23) during ramp 0
• Bit 3 – POMV2A3: Output Matrix Output A Ramp 3
This bit gives the state of the PSCOUT20 (and/or PSCOUT22) during ramp 3
• Bit 2 – POMV2A2: Output Matrix Output A Ramp 2
This bit gives the state of the PSCOUT20 (and/or PSCOUT22) during ramp 2
• Bit 1 – POMV2A1: Output Matrix Output A Ramp 1
This bit gives the state of the PSCOUT20 (and/or PSCOUT22) during ramp 1
• Bit 0 – POMV2A0: Output Matrix Output A Ramp 0
This bit gives the state of the PSCOUT20 (and/or PSCOUT22) during ramp 0
Bit 7
-
Read/Write R
Initial Value 0
Bit 7
-
Read/Write R
Initial Value 0
6 5 4
POMV2B1 POMV2B0
R/W R/W R/W
0 0 0
6 5 4
- PSEIE0 PEVE0B
R R/W R/W
0 0 0
6 5 4
- PSEIE1 PEVE1B
R R/W R/W
0 0 0
AT90PWM2/3/2B/3B
3 2 1
POMV2A3 POMV2A2 POMV2A1
R/W R/W R/W
0 0 0
3 2 1
PEVE0A - -
R/W R R
0 0 0
3 2 1
PEVE1A - -
R/W R R
0 0 0
0
POMV2A0 POM2
R/W
0
0
PEOPE0 PIM0
R/W
0
0
PEOPE1 PIM1
R/W
0
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