Atmel AT90PWM2 Manual page 132

16.4 Signal Description
16.4.1 Input Description
4317I–AVR–01/08
Figure 16-3. PSC External Block View
CLK
CLK
SYnIn
StopOut
OCRnRB[11:0]
OCRnSB[11:0]
OCRnRA[11:0]
OCRnSA[11:0]
OCRnRB[15:12]
(Flank Width
Modulation)
PICRn[11:0]
IRQ PSCn
Note: 1. available only for PSC2
2. n = 0, 1 or 2
Table 16-1. Internal Inputs
Description
Name
OCRnRB[1
Compare Value which Reset Signal on Part B (PSCOUTn1)
1:0]
OCRnSB[1
Compare Value which Set Signal on Part B (PSCOUTn1)
1:0]
OCRnRA[1
Compare Value which Reset Signal on Part A (PSCOUTn0)
1:0]
OCRnSA[1
Compare Value which Set Signal on Part A (PSCOUTn0)
1:0]
PLL
I/O
12
12
12
12
4
12
StopIn SYnOut PSCnASY
AT90PWM2/3/2B/3B
PSCOUTn0
PSCOUTn1
(1)
PSCOUTn2
(1)
PSCOUTn3
PSCINn
Analog
Comparator
n Output
Type
Width
Register
12 bits
Register
12 bits
Register
12 bits
Register
12 bits
133