Atmel AT90PWM2 Manual page 97

AT90PWM2/3/2B/3B
98
These bits control the Output Compare pin (OC0B) behavior. If one or both of the COM0B1:0
bits are set, the OC0B output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC0B pin
must be set in order to enable the output driver.
When OC0B is connected to the pin, the function of the COM0B1:0 bits depends on the
WGM02:0 bit setting. Table 14-5
are set to a normal or CTC mode (non-PWM).
Table 14-5. Compare Output Mode, non-PWM Mode
COM0B1 COM0B0
0 0
0 1
1 0
1 1
Table 14-6 shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to fast PWM
mode.
Table 14-6. Compare Output Mode, Fast PWM Mode
COM0B1 COM0B0
0 0
0 1
1 0
1 1
Note: 1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See
for more details.
Table 14-7 shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to phase cor-
rect PWM mode.
Table 14-7. Compare Output Mode, Phase Correct PWM Mode
COM0B1 COM0B0
0 0
0 1
1 0
1 1
Note: 1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See
page 93 for more details.
• Bits 3, 2 – Res: Reserved Bits
These bits are reserved bits in the AT90PWM2/2B/3/3B and will always read as zero.
• Bits 1:0 – WGM01:0: Waveform Generation Mode
shows the COM0B1:0 bit functionality when the WGM02:0 bits
Description
Normal port operation, OC0B disconnected.
Toggle OC0B on Compare Match
Clear OC0B on Compare Match
Set OC0B on Compare Match
Description
Normal port operation, OC0B disconnected.
Reserved
Clear OC0B on Compare Match, set OC0B at TOP
Set OC0B on Compare Match, clear OC0B at TOP
Description
Normal port operation, OC0B disconnected.
Reserved
Clear OC0B on Compare Match when up-counting. Set OC0B on
Compare Match when down-counting.
Set OC0B on Compare Match when up-counting. Clear OC0B on
Compare Match when down-counting.
(1)
"Fast PWM Mode" on page 92
(1)
"Phase Correct PWM Mode" on
4317I–AVR–01/08